cad.bib

@INPROCEEDINGS{gowdaetal:ecctd-07,
  TITLE = {Synthesis of Threshold Logic Circuits Using Tree Matching},
  AUTHOR = {Tejaswi Gowda and
            Samuel Leshner and
               Sarma B. K. Vrudhula and
               Goran Konjevod},
  BOOKTITLE = {Proceedings of the 18th European Conference on Circuit Theory and Design},
  YEAR = {2007},
  CATID1 = {conference.paper},
  CATID1 = {cad.paper},
  URL = {2007 ecctd matching.pdf}
}

@INPROCEEDINGS{gowdaetal:glsvlsi-07,
  AUTHOR = {Tejaswi Gowda and
               Sarma B. K. Vrudhula and
               Goran Konjevod},
  TITLE = {Combinational equivalence checking for threshold logic
circuits.},
  BOOKTITLE = {ACM Great Lakes Symposium on VLSI},
  YEAR = {2007},
  PAGES = {102-107},
  EE = {http://doi.acm.org/10.1145/1228784.1228813},
  BIBSOURCE = {DBLP, http://dblp.uni-trier.de},
  CATID1 = {conference.paper},
  CATID1 = {cad.paper},
  URL = {2007 glsvlsi thresholdequiv.pdf}
}

@INPROCEEDINGS{srinivasanetal:aspdac-07,
  AUTHOR = {Krisnan Srinivasan and Karam S. Chatha 
and Goran Konjevod},
  TITLE = {Application Specific Network-on-Chip Design with 
Guaranteed Quality Approximation Algorithms},
  BOOKTITLE = {Proceedings of ASP-DAC},
  YEAR = {2007},
  CATID1 = {conference.paper},
  CATID1 = {approx.paper},
  CATID1 = {polyhedral.paper},
  CATID1 = {cad.paper},
  URL = {noc-aspdac07.pdf}
}

@INPROCEEDINGS{ostleretal:aspdac-07,
  AUTHOR = {Chris Ostler and Karam S. Chatha
and Goran Konjevod},
  TITLE = {Application Throughput Maximization on 
Network Processor Architectures},
  BOOKTITLE = {Proceedings of ASP-DAC},
  CATID1 = {conference.paper},
  CATID1 = {cad.paper},
  YEAR = 2007,
  URL = {throughput-aspdac07.pdf}
}

@ARTICLE{srinivasanetal:tvlsi-06,
  AUTHOR = {Krishnan Srinivasan and Karam S. Chatha and Goran Konjevod},
  TITLE = {Linear-programming-based techniques for synthesis of 
   network-on-chip architectures},
  JOURNAL = {IEEE Trans. VLSI Syst.},
  VOLUME = {14},
  NUMBER = {4},
  PAGES = {407-420},
  YEAR = {2006},
  CATID1 = {journal.paper},
  CATID1 = {cad.paper},
  URL = {tvlsi05.pdf}
}

@INPROCEEDINGS{srinivasanetal:iccad-05,
  AUTHOR = {Krishnan Srinivasan and Karam S. Chatha and Goran Konjevod},
  TITLE = {An Automated Technique for Topology and Route Generation
  of Application Specific On-Chip Interconnection Networks},
  BOOKTITLE = {Proceedings of the ICCAD},
  YEAR = {2005},
  PAGES = {},
  CATID1 = {conference.paper},
  CATID1 = {polyhedral.paper},
  CATID1 = {cad.paper},
  URL = {ICCAD05.pdf}
}

@INPROCEEDINGS{srinivasanetal:iccd-04,
  AUTHOR = {Krishnan Srinivasan and Karam S. Chatha and Goran Konjevod},
  TITLE = {Linear Programming Based Techniques for Synthesis of 
Network-on-Chip Architectures},
  BOOKTITLE = {Proceedings of the  22nd ICCD},
  PAGES = {422--429},
  YEAR = {2004},
  CATID1 = {cad.paper},
  CATID1 = {conference.paper},
  URL = {iccd04.pdf}
}

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